Looking for students with an interest in Liturgical Greek Orthodox (Byzantine) Music for a research project (NEW)
3rd November 2022
I am looking for passionate and dedicated students who have an interest in applied research related to music in general, and liturgical byzantine music in particular. The project will not start until many months for now, so I am currently looking to form the research group. and making sure interested students have the necessary competencies. This project could end up and be used as your graduation project. Publications are also expected as an outcome of this project.
Interested students must have the following competencies:
- Very good knowledge of Python Programming
- Very good knowledge of AI and machine learning (or willing to learn)
- Good understanding of digital signals processing (Taking the EE Signal and Systems course is sufficient)
- Willingness to learn the Byzantine Music Scale on their own or enroll in a dedicated course held by the Church
- Familiarity with Greek Orthodox (Greek Catholic) Byzantine Hymns is preferable.
- Having a background in reading western music scales is a plus.
If you are interested, please send me an email to a.suyyagh@ju.edu.jo with the title Byzantine Music Project
d
Future Announcements during Distant-Learning Phase
During the distant learning phase imposed due to COVID-19, and given that UJ recommends using MS Teams and/or LMS platforms, future course announcements will be posted on these respective platforms.
Embedded Systems Lab Totals out of 60 – All Sections
Dear Students,
You can see your grades with all details out of 60 by clicking HERE
If there is a mistake in your grade, kindly report back to us before December 30th, 2019. Once the final exam is over, we cannot revise your marks as we will submit the final grades to the registrar immeditely afterwards.
Real-Time Project
Dear RTCC Students, the revised project and its associated sensor log files is now online. Kindly read the instructions at the end carefully.
Project and Report Grading Sheet
إعلان بخصوص مشروع مختبر مادة الأنظمة المضمنة
أخر موعد لحجز موعد مناقشة المشروع هو منتصف ليل يوم السبت 14/12/2019 وسيتم إغلاق الحجز بعدها وكل من لم يقم بالحجز يعتبر مستنكفاً وعلامته صفر
تعتبر المناقشة بمثابة إمتحان مدته نصف ساعة، كل من يتأخر عن موعده لن يتم تعويض المناقشة أو عمل ازاحة ويناقش الطلبة خلال ما تبقى لهم من النصف ساعة
في حال تواردت شكوك حول قيام الطلبة بشراء المشروع أو تكليف غيرهم بعمله نيابة عنهم، سيتم تحويل الطلبة إلى منسق الماده، وإن تأكدت الشكوك، سيتم تحويل الطلبة إلى لجنة تحقيق، وإن ثبت قيام الطلبة بشراء المشروع أو تكليف غيرهم بعمله، فإن هذا قد يعرضهم لأن يتم التنسيب بتطبيق المادة ٥ من نظام تأديب الطلبة في الجامعة الأردنية وتعديلاته التي تنص على:
أ – توقع على الطالب العقوبات التالية مجتمعة إذا كان من طلبة الكليات التي تتبع نظام الساعات المعتمدة:-
اعتباره راسباً في تلك المادة
إلغاء تسجيله في بقية المواد المسجلة له في ذلك الفصل
فصله من الجامعة لمدة فصل دراسي واحد يلي الفصل الذي ضبط فيه
يتم تسليم برنامج المشروع إلكترونيا على ايميل الدكتور أشرف الصياغ في نفس يوم المناقشة a.suyyagh@ju.edu.jo
تسليم تقرير المشروع لجميع الشعب هو يوم الخميس ١٩/١٢/٢٠١٩ إلى المهندسة التي قامت بالمناقشة
لن يتم التهاون بتنفيذ أي من أعلاه مهما كانت الأسباب
Reserve your project discussion slot
The Embedded Systems Lab final project discussions will take place on the week of December 15th, 2019. Each discussion will take no more than 30 minutes. You should reserve your discussion slot using the following link ” Project Discussion Reservation Sheet”. You should be there on time! Your H/W circuit must be ready by the time you present your project. You MUST submit your codes and your project report by the end of week (Thursday 19th. December, 2019). You must hand in your printed reports to the lab engineers. Late submissions will automatically get a zero. Kindly check the report section in the project handout.
Groups who opt to present their project before December 15th will get an early submission bonus of 2 Marks.
The days and time the lab will be open for programming the kits, as well as the grading sheet will be announced soon.
Goood Luck
Embedded Lab Mid-Term Results – All Sections
The Embedded Systems Mid-Term Results are ready. You can see your grade from HERE. Statistical results are given for your convenience.
Computer Applications Lab First Quiz – All Sections
This is a reminder that we will be having the computer applications practical lab quiz the week of October 27th for all lab sessions. The quiz only includes the first three experiments. The quiz is out of 10 and it starts at the beginning of the lab. Please do not be late as there will be no make-up quiz under all circumstances. Good Luck everyone.
Embedded Lab First Quiz – All Sections
This is a reminder that we will be having the embedded lab quiz the week of October 20th for all lab sessions. The quiz is going to be practical where your understanding of the instruction set architecture and using MPLAB will be tested. Please do not be late as there will be no make-up quiz. The quiz is out of 5. The quiz duration is 20 minutes and it starts at the beginning of the lab. Good Luck everyone.
Semester Grades out of 60
Kindly review the Embedded Systems Lab totals out of 60. Please check your grades and make sure they are correct for the quiz and the mid-term exam. The project totals include the bonus for those of you who submitted one. The “F” grade is for totals lower than 45 out of 100.
Most of you have lost project marks on the report; the majority of you don’t know the basic skills of writing a technical report. Most of you did not adhere to the report requirements as laid down in the grading sheet.
I shall be in my office at 12:00 P.M on Monday, August 5th, 2019 before the final exam for those of you who would like to check their project reports or revise their grades.
(UPDATED) Expected Subroutine O/P and the times to Program the Hardware
This is the expected subroutines output for the following input in the lab project:
INPUT:
MSG = ATTK
KEY_1 = 0xD2A5664F
KEY_2 = 0x E0B15ADD
OUTPUT:
KEY_3 = 0x2341C329
KEY_4 = 0xBA9CAEBB
Encrp = 0xC266C1D2 (after five rounds as specified)
Also, you have access to the lab to download the program onto the PIC16 on the following dates:
Monday 12:00 – 3:00 P.M.
Tuesday 12:00 – 2:00 P.M
Reserve your project discussion slot
The Embedded Systems Lab final project discussions will take place on Wednesday, the 31st July 2019. Each discussion will take no more than 30 minutes. You should reserve your discussion slot using the following link ” Project Discussion Reservation Sheet”. You should be there on time! Your H/W circuit must be ready by the time you present your project. You MUST submit your codes and your project report by 3:00 P.M. on the same day of discussion. You must send your codes and reports by email to Dr. Suyyagh. Late submissions after 3:00 P.M. will automatically get a zero.
Project Discussion Grading Sheets
These are the draft versions of the project and project report grading sheets. There are two versions, one for groups that have two or more students, and one for students doing the project by themselves. Make sure you check the correct grading sheet for your case.
Grades after students’ revision
The grades after student revision are now online and can be reviewed in the file below. If you have any notes, please get back to me ASAP
USART Experiment this week + Exam Grades
This week we will switch the A/D experiment with the USART in order to help you with the project. So this Monday and Wednesday, we will be having the USART experiment. Kindly prepare the prelab accordingly.
Make sure you register for the project groups before Monday
The mid-term exam grades are posted.
Embedded Lab – Project
The embedded lab project description can be downloaded from the link below. Inside the file, you have a link for the project signup sheet which should be completed by July 8th, 2019. The project deadline is July 31st, 2019.
Embedded Lab – Quiz 1
This is a reminder that tomorrow (Wednesday, June 26th, 2019) we will be having the lab quiz. As I have explained during the lab yesterday, the quiz is going to be practical where your understanding of the instruction set architecture and using MPLAB will be tested. Please do not be late as there will be no make-up quiz. The quiz is out of 5. The quiz duration is 20 minutes and it starts at 1:00 P.M sharp. Good Luck everyone
Dr. Ashraf Suyyagh 